ASIC Verification Engineer

Broadcom is seeking an ASIC Verification Engineer to join their team in Pune, India. The role involves developing test plans for various features related to Block, Core, and SoC, as well as writing functional coverage for these features. Daily tasks include creating verification environments using System Verilog and UVM, architecting scalable test benches, and developing bus functional models, checkers, monitors, and scoreboards. The engineer will also build pseudo-random tests to ensure full functional coverage and debug regression failures in RTL and gate-level simulations. Candidates should possess a Bachelor’s or Master’s degree in electrical engineering or a related field, along with over eight years of relevant experience. Proficiency in System Verilog and verification methodologies such as UVM, VMM, or OVM is essential. A solid understanding of object-oriented programming principles and familiarity with host interface protocols like PCIe, SAS, and SATA is desired. Knowledge of AMBA AXI/AHB/APB protocols is also beneficial. The position requires the ability to work independently on various IP, subsystem, or SoC projects.