PD Intern

Etched is hiring a Physical Design intern in San Jose to help turn front-end chip designs into silicon and support faster progress toward final signoff. The role involves working on physical design flows, synthesizing blocks, automating design checks, and contributing to RTL design decisions. It suits students working toward a bachelor’s, master’s, or PhD in electrical engineering, computer engineering, or a related field, especially those with exposure to high-speed digital logic, ASIC or SoC design, SystemVerilog, UVM, Python, or physical design tools. The company is looking for interns who can learn quickly and are interested in modern AI systems, including transformers.

About Etched Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history. Job Summary As a Physical Design intern for Etched, you will be responsible for realizing our front-end designs in silicon, helping Etched to improve iteration speed to final signoff. You will assist in developing and running Physical Design flows to synthesize blocks, automate final design checks, and advise RTL design decisions. We are looking for Fall '26, Spring '27, and Summer '27 interns. You may be a good fit if you have - Progress towards a Bachelor’s, Master’s, or PhD degree in electrical engineering, computer engineering, or a related field. - Familiarity with high-speed digital logic - Exposure to ASIC or SoC design concepts - Familiarity with SystemVerilog, UVM, or Python - Familiarity with verification work and writing test benches - Familiarity with physical design flows and tooling - Are able to learn quickly about transformers and other aspects of modern artificial intelligence Strong candidates may also have experience with - Familiarity with modern ML and LLM model architectures - Familiarity with numerical representations and functions (RTL) - Familiarity with clocking and reset schemes (RTL/PD) - UVM or formal verification experience (DV) - Ability to program with Python or another scripting language We encourage you to apply even if you do not believe you meet every single qualification. Program details - 12-week paid internship - Generous housing support for those relocating - Daily lunch and dinner in our office - Based at our office in San Jose, CA - Direct mentorship from industry leaders and world-class engineers - Opportunity to work on one of the most important problems of our time For any questions, contact internships@etched.com How we’re different Etched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors. We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.